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As the amount and complexity of electronics for airborne applications continues to rise, an increasing number of applications need to comply with the RTCA DO-254/Eurocae ED-80 standard for certification of complex electronic devices such as ASICs or FPGAs. The specification includes five levels of compliance, known as Design Assurance Levels (DAL), that range in severity from A (where hardware failure would result in catastrophic failure of an aircraft) to E (where failure would not affect safety).

 

A DO-254 compliant design is specified using a set of formal requirements. As part of the certification process, the developer must prove that their implementation meets all of these requirements. The objective of DO-254 is to demonstrate that the development and verification of complex hardware complies with this process. A key principle in a DO-254 flow is that the verification results (simulation waveforms, regression status, coverage data) must be traceable and linked to the formal requirements. The process of traceability may be either automated or manual; the output capabilities of the tools utilized in the flow will determine both the ease and degree of automation.

 

The Verisense hardware verification platforms focus on ease of use and automation and on ensuring that the verification effort is a predictable, quantifiable and easily repeated.

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Verisense Hardware Verification Platforms

Hardware verification is one of the most crucial phases to the DO-254 process since this is where the design is checked vs. the initial formal requirements. As such, an efficient mechanism to link the verification plan and its results back to the original requirements documents is mandatory for demonstrating DO-254 compliance.

However for FPGA and ASICs, this is also the area which is most lacking in verification tools and there is no de-facto industry-wide accepted practice on what is the most appropriate method for hardware verification. It is important to note that DO-254 specifies a process but it does not specify the detailed implementation of the process.

Historically, the most common method for hardware verification was to probe the pins of the FPGA. This is a very time consuming process which is often very complex, not automated, not easily reproducible, and often not really technologically feasible, especially on high speed interfaces.

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The Verisense hardware verification tester tool platforms close this gap!

The two most common approaches to hardware verification of FPGAs and ASICs are either dedicated hardware in the loop testers in which you test the FPGA or ASIC in a dedicated system designed specifically for this purpose, or verification of the FPGA/ASIC in the final destination hardware system.

Verisense has developed hardware verification tester tools to address both these approaches. They are already being used to certify customer DAL A and B FPGA designs. We would be happy to discuss your needs and our solutions with you.

It is important to note that the eventual complexity (and cost) of the hardware verification solution can often be substantially reduced by making fairly simple decisions in the definition stage of your product. We strongly suggest that you be in touch with us as early in your development process as possible.

Check out our product brief.

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Verisense Service Models

We recognize that for most customers, the DO-254 certification is a necessity which they need to comply with, but it is not a product differentiator. Therefore, many customers would be happy to off-load the hardware verification effort to someone else. Regardless of whether you want to do most of the work yourself, or if you want to off-load the bulk of it to someone else, Verisense has a model that will work for you.

At the most basic level, we can provide you with a hardware verification system. You can prepare and run all your tests on the system and generate the information you need for your certification. Or, If you prefer, we can be much more involved in the process and generate the required tests and then run them on the verification system for you. As needed we can also participate in your DER reviews to discuss the process and results.

An integral part of our business model is to design and verify ASICs and FPGAs, so we would of course be happy to discuss helping you with any design and verification requirements you may have.

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DO-254 Training Partner

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