Inomize is a professional Research & Development firm specializing in designing and delivering hardware solutions. We offer a broad range of services tailored to meet your project needs.
Inomize successfully delivers ambitious projects on schedule and within budget.
We take full advantage of innovative technology, and when necessary, push it to the limits. Years of experience and proactive project management approach, allow Inomize to reduce development time and minimize the risks involved in designing complex hardware projects.
Established in 2007, Inomize is a fast-growing company and the largest Israeli ASIC design firm in Israel. Our customers include leading international corporations and start-up companies from Israel, Europe, and North America.
Inomize is a professional Research & Development firm specializing in designing and delivering hardware solutions. We offer a broad range of services tailored to meet your project needs.
Inomize successfully delivers ambitious projects on schedule and within budget.
We take full advantage of innovative technology, and when necessary, push it to the limits. Years of experience and proactive project management approach, allow Inomize to reduce development time and minimize the risks involved in designing complex hardware projects.
Established in 2007, Inomize is a fast-growing company and the largest Israeli ASIC design firm in Israel. Our customers include leading international corporations and start-up companies from Israel, Europe, and North America.
SINCE 2007
Senior VLSI Engineer
Description:
Responsibility for the overall design of digital logic blocks from an architectural specification, RTL design, block level verification, synthesis, timing constraints - through full-chip sign-off.
The Responsibility also includes supporting design verification and backend to tape out of the full chip.
Requirements:
BSEE is required, MSEE is preferred.
Minimum 5 years of experience in logic design using Verilog.
Experience with architecture, specs, documentation, coding in Verilog and debugging.
Knowledge of USB, DDR2/DDR3 and modem PHY designs - an advantage.
Experience in full VLSI project flows - an advantage.
Knowledge in verification processes - an advantage.